1. Field of the Invention
The invention relates to an apparatus and method for mounting multi-chip land grid array modules to printed wiring boards, and specifically to a customizable backer for achieving consistent loading and engagement of the array package connections.
2. Background Information
Land grid array (LGA) connectors are used in many electronic applications to create mechanically loaded electrical connections between contact features (i.e., pads) present on printed wiring boards (PWB's) and those on mating chip modules (i.e., one or more semiconductor chips mounted on a carrier substrate). LGA connector technologies typically must operate under a relatively tight range of mechanical loading conditions to ensure that individual contacts in the array achieve consistent interconnection mating loads for high initial yields at the time of assembly and guaranteed long term field reliability. The tight tolerance of loading required for these LGA connector technologies is a direct consequence of limited mechanical elastic compliance that most individual LGA contact spring members possess within the land grid array connector body. As a result of this limited mechanical contact compliance, mating surfaces of PWB's, chip modules, and all mechanical hardware used in the stacking and loading configuration of these connectors in actual applications must have precision mechanical tolerances, and an aggregate high degree of mating surface coplanarity in order to facilitate a tight distribution of individual contact loads sufficient to guarantee high contact reliability. Unfortunately, although the machined mechanical hardware used to load LGA connectors can be made to extremely high precision tolerances (i.e., very flat and very uniform thickness), the same cannot be said for the conventional PWB's and chip modules included in the connector stack. PWB's and modules always have significant surface variations and thickness variations that result from process conditions inherent to their fabrication and from unique wiring and via density differences within them that can alter their thicknesses, shapes, or the surface topographies of their respective mating LGA contact/contact pad surfaces. These PWB and chip module shape variations can produce significant LGA contact load non-uniformities (both high and low loading conditions) that ultimately result in a number of problematic post assembly conditions, including high initial yield loss of components and the potential for latent field defects including module cracking phenomena, contact intermittency, and gradual loss of complete electrical continuity of individual contact members due to occurrence of fretting corrosion.
With respect to these issues, various approaches have recently been developed and used (circa 1999 to the present) to more tightly control LGA contact load distributions, and to compensate for board and module carrier thickness, shape, and topographic variations. (See, for example, Brodsky et al., U.S. Patent Application Publication No. 2004/0188135, Hoffmeyer, U.S. Pat. No. 6,711,026, Torok et al., U.S. Pat. No. 6,485,411, and Sinha et al., U.S. Pat. No. 6,475,011, all assigned to IBM Corporation). These methods include mechanical hardware and load designs that drive in phase shape changes of the stack of hardware under applied loading conditions, and the addition of various design elements that reduce the amount of intrinsic shape, thickness, and topographic variation of actual module and board array interconnection surfaces.
One approach of relevance to the present application is disclosed in Corbin, Jr. et al., U.S. Pat. No. 6,921,272. The apparatus in Corbin Jr. et al. uses an insulating backer plate which compensates for PWB thickness variation (the major contributor to LGA contact load non-uniformities, see FIGS. 1 and 2 of this application). This backer plate consists of a series of concentric overlying layers of Kapton film that are adhered to a molded backer plate made of an electrically insulating material. When this backer plate structure is added to the stack of mechanical components that load the LGA connector system, the backer structure fills in the backside “dish” present on PWB LGA site such that the array site of the board can be mechanically biased towards the intended LGA connector to present a more planar surface to the connector system. Although successfully used in various applications, the backer plate structure of Corbin, Jr. et al. has several limitations for LGA load control. The principal limitation is that this structure must be tailored in advance to an anticipated or relatively narrow measured range of actual PWB thickness variations for a given application. This lack of flexibility can lead to various problems which must be examined with continued scrutiny and inspection in a manufacturing environment. For example, if an improperly selected backer shape is used, or if PWB thickness variation exceeds that of the intended backer plate shape design, or if the amount of board dishing changes over time due to PWB fabrication process drift, some of the LGA interconnect reliability problems referred to above can arise after assembly. Furthermore, if problems are encountered during inspection, raw PWB shape function sorting would have to be exercised prior to assembly, and could result in significant yield losses and added costs, particularly on complex multi-layer, thick cross section boards that facilitate the LGA interconnection of large glass ceramic multi-chip modules, such as those used in supercomputer systems.